How CADY’s AI-powered technology detected two critical errors in the final stage of a schematic design, preventing the need for a re-spin

Introduction

We were approached by a large French Telecom company that needed a technological solution to reduce re-spin rates and expedite development time. The company had heard of CADY’s automatic electrical inspection solution and started using the system. The company had several objectives in their search for a solution:

Initially the company used circuit designs that in which they deliberately inserted mistakes to test the integrity of CADY’s solution and after validating the accuracy of the technology started using CADY for live board automatic inspection.

Automatic electrical inspection solution

Following the review process, they decided to become paying users. Immediately following, they uploaded a real, “live” design for automatic inspection. CADY’s system promptly generated a comprehensive inspection report.

Inspection Report Overview

CADY’s report includes a variety of findings ranging from wrong input voltages to connection instruction violations. On average, 80% of the findings are accurate based on the system’s understanding of datasheet’s information. Each finding is presented in a new line containing a drop-down selection where the user can mark the finding as “Need to Fix” or “Skip”. “Need to Fix” is quite straight forward whereas in the “Skip” option the user has a choice to ignore the alert due to intentional design or due to insignificance. The rest (20%) are false positive alarms (not design errors) that can easily be classified by the user, as the system provides information in the report regarding the information’s origin in the datasheet, that led the system to issue that specific alert.

In over 65% of the inspected projects, at least one of the findings is marked as “Need to fix”, meaning that the finding is accurate and significant, and the user fixed it to improve their design based on CADY’s report.

In this case study, the user marked two findings as “Need to fix”.

Let us dive deeper into these findings:

Supply voltage outside of maximum operating condition

The system identified ADL5569 in the Netlist and BOM and matched it to the corresponding entry in CADY’s database. Pins 14 and 8 are the Power-in pins (VCC and VCC2). The system inferred their function from the datasheet and realized their operating supply voltage range according to the datasheet’s specification is 4.75V to 5.25V.

Following, the system traversed the netlist and found the VCC pins were connected to a 3.3V DC supply voltage net. Being out of rage, it alerted there was a mismatch between the connect DC supply voltage and the supply voltage range. Connecting this component to undervoltage may lead to a product malfunction, exhibit erratic behavior, or even fail completely.

Exposed pad connection instruction violation

The system identified ADL5569 in the Netlist and BOM and matched it to the corresponding entry in CADY’s database. The system deduced from the component’s datasheet that it contains an exposed pad which must be soldered to the ground. Analyzing the circuit design, the system detected the EPAD pin as an additional pin to the IC in the netlist, traversed the pin’s connections, and found no connection to ground.

Failing to connect an exposed pad to ground when instructed to by the manufacturer may cause the following:

Thermal Problems: an exposed pad, also known as a thermal pad, is designed to dissipate heat generated by the component. Without proper grounding, the heat dissipation capability pad may be compromised, leading to the component’s temperature rising, resulting in thermal stress, reduced performance, or failure.

Electrical Noise: Grounding the exposed pad helps in providing a low-impedance path for electrical currents. Without proper grounding, the exposed pad may act as an antenna, picking up electromagnetic interference (EMI) or radio frequency interference (RFI). This may introduce electrical noise to the circuit leading to signal integrity issues, decreased performance which may result in complete malfunction.

After marking these two findings as “Need to fix”, the user fixed the error in the schematic, ran the inspection again. These findings did not re-appear, thus verifying the revised design errors were corrected. Reviewing the inspection report took no more than an hour. Detecting these errors prior to layout phase saved at least one re-spin.

Detecting errors prior to layout phase saves at least one re-spin

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